There has been known a light-coupled solid state relay including a light emitting element, which emits lights according to an input signal, and a light receiving element which receives an optical signal from the light emitting element to produce an electromotive force by which an output MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) is turned on and off (see, e.g., Japanese Patent Application Publication No. H08-204533 (JPh08-204533A)). The solid state relay has been employed for various uses because it has a small on-resistance, a small volume, and can control a minute analog signal.
FIG. 11 shows a configuration of a conventional solid state relay. As shown in FIG. 11, the solid state relay includes: a light emitting element 110, such as an LED, which generates an optical signal in response to an input signal inputted from input terminals T1 and T2; a photoelectric conversion unit 120 including a photodiode array 121 which receives the optical signal and produces an electromotive force and a charge and discharge circuit 122 which charges and discharges the produced electromotive force; and an output elements 130 (130a and 130b) including two output MOSFETs 131a and 131b, respectively, each of which is turned on or turned off according to a voltage from the charge and discharge circuit 122.
As for such output MOSFETs 130a and 130b, SiC-MOSFETs made of SiC has drawn attention thanks to their high withstand voltage and small on-resistance.
FIG. 12 shows the configuration of each of the output MOSFETs 130a and 130b. Specifically, an n type epitaxial growth layer 2 is formed on an n type SiC substrate 1, a p type well region 3 is formed on the n type epitaxial growth layer 2 and a source 4 formed of an n type diffusion layer is formed on the p type well region 3. Further, a gate electrode 7 is formed on a surface of the p type well region 3 via a gate insulating film 6 formed of a silicon oxide layer. A channel region is also provided on the surface of the p type well region 3. The reference numerals “5” and “9” indicate a source electrode and a drain electrode, respectively. In addition, body diodes 132a and 132b are formed between the p type well region 3 and the epitaxial growth layer 2. The reference characters “Rch,” “Repi” and “Rsub” indicates channel resistance, epitaxial layer resistance and substrate resistance.
When a positive voltage and a negative voltage are respectively applied to a drain and a source, the MOSFET is turned on or off through a channel depending on whether or not a predetermined voltage is applied to the gate electrode 7. However, when a positive voltage and a negative voltage are respectively applied to the source and the drain, a forward-direction voltage is applied to a pn junction of the body diode 132a (132b), so that a current flows in a forward direction of the body diode 132a (132b) regardless of whether or not the predetermined voltage is applied to the gate electrode 7.
A compound semiconductor such as a SiC has a problem in that the increase of crystal defects is caused by the current flowing in the forward direction of the pn junction diode. The on-resistance has the epitaxial layer resistance Repi and the substrate resistance Rsub. Consequently, in the case of the SiC substrate, a current flowing in the forward direction causes the increase of crystal defects. This results in the increase of the on-resistance of a SiC-MOSFET, which should be solved.
In the meantime, a switching element is employed in a power conversion device such as an inverter for converting a direct current (DC) to an alternating current (AC), a converter for converting AC to DC, and the like. As for the switching element, there has been suggested a FET (Field Effect Transistor) made of a compound semiconductor such as a SiC semiconductor, a GaN semiconductor or the like. The compound semiconductors are suitable for high-temperature processes since they have high bandgap energy and heat resistant temperature. Accordingly, by using a FET made of such a compound semiconductor material, it is possible to reduce the cost for cooling elements and obtain a high withstand voltage (see, e.g., Japanese Patent Application Publication No. 2003-229566 (JP2003-229566A)). In this cited reference, there is used a substrate on which a power FET serving as a switching element and a protection element such as a GaN based Schottky diode or the like are integrated together.
There has also been suggested a FET whose nitride-based compound semiconductor layer is formed on a substrate. The FET and a diode serving as a protection element for the FET are integrated to be connected in parallel (see, e.g., Japanese Patent Application Publication No. 2007-266475 (JP2007-266475A)). This is to reduce the power loss by suppressing the leakage caused by threading dislocation generated when a nitride-based compound semiconductor layer is formed [Paragraph 0044]. In this example, by providing a diode to a FET, it is possible to make the current avoid the threading dislocations which are generated perpendicularly to the substrate.
As described above, a SiC-MOSFET used as an output switching element, i.e., an output element of the solid state relay disclosed in JPh08-204533A, may cause further increase in the on-resistance due to the increase of crystal defects.
Further, in JP2003-229566A and JP2007-266475A, there is disclosed an example where a protection element is connected in parallel to a nitride-based compound semiconductor element in a nitride-based compound semiconductor device. However, aging effects caused by the multiple repetition of turning on and off the semiconductor element is not mentioned therein. Additionally, since the semiconductor element and the protection element are integrated, the current flows even in the nitride-based compound semiconductor device.
In this nitride-based compound semiconductor device, the current is controlled to flow, avoiding the threading dislocations that are generated perpendicularly to the substrate. In fact, the current flows in the high-resistance epitaxial growth layer. Further, due to the high power consumption, it is difficult to satisfactorily reduce the power consumption.
It is also difficult to integrate the protection element, and thus it is necessary to form a contact region having a deep depth in the substrate, or parasitic elements are increased, as in JP2003-229566A and JP2007-266475A. In addition, the integration of the protection element is affected by the heat emission caused by the electric field in the protection element or the current generated when a power is supplied. Such crystal defects may also be increased in various compound semiconductor FETs such as GaN-based FETs as well as the SiC-MOSFETs.